Compile SystemRDL into a SystemVerilog control/status register (CSR) block
Compile SystemRDL into a SystemVerilog control/status register (CSR) block.
For the command line tool, see the PeakRDL project.
See the PeakRDL-regblock Documentation for more details
FAQs
Compile SystemRDL into a SystemVerilog control/status register (CSR) block
We found that peakrdl-regblock demonstrated a healthy version release cadence and project activity because the last version was released less than a year ago. It has 1 open source maintainer collaborating on the project.
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