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dw-cache

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dw-cache - npm Package Compare versions

Comparing version 0.0.103 to 0.0.104

36

dist/index.js

@@ -1,2 +0,2 @@

/*! dw-cache v0.0.103 https://github.com/falsandtru/dw-cache | (c) 2021, falsandtru | (Apache-2.0 AND MPL-2.0) License */
/*! dw-cache v0.0.104 https://github.com/falsandtru/dw-cache | (c) 2021, falsandtru | (Apache-2.0 AND MPL-2.0) License */
(function webpackUniversalModuleDefinition(root, factory) {

@@ -391,3 +391,3 @@ if(typeof exports === 'object' && typeof module === 'object')

class Entry {
constructor(key, value, size, partition, region, expiration) {
constructor(key, value, size, partition, affiliation, expiration) {
this.key = key;

@@ -397,3 +397,3 @@ this.value = value;

this.partition = partition;
this.region = region;
this.affiliation = affiliation;
this.expiration = expiration;

@@ -446,3 +446,3 @@ this.enode = undefined;

if (capacity >= 1 === false) throw new Error(`Spica: Cache: Capacity must be 1 or more.`);
this.window = capacity * settings.window / 100 >>> 0;
this.window = capacity * settings.window / 100 >>> 0 || 1;
this.partition = capacity - this.window;

@@ -480,3 +480,3 @@ this.injection = 100 * this.declination;

} = this;
this.window = capacity * settings.window / 100 >>> 0;
this.window = capacity * settings.window / 100 >>> 0 || 1;
this.resource = resource ?? settings.resource ?? capacity;

@@ -532,3 +532,3 @@ this.sweeper.resize(capacity, settings.sweep.window, settings.sweep.room, settings.sweep.range);

if (entry.partition === 'LRU') {
if (entry.region === 'LRU') {
if (entry.affiliation === 'LRU') {
if (eviction) return entry;

@@ -540,3 +540,3 @@ ++this.overlapLRU;

} else {
if (entry.region === 'LFU') {
if (entry.affiliation === 'LFU') {
if (eviction) return entry;

@@ -546,3 +546,3 @@ ++this.overlapLFU;

--this.overlapLRU;
if (this.overlapLRU * 100 < this.LFU.length * this.sample) {
if (this.declination !== 1 && this.overlapLRU * 100 < this.LFU.length * this.sample) {
this.declination = 1;

@@ -579,3 +579,3 @@ }

const entry = LRU.head.prev;
if (entry.region === 'LRU') {
if (entry.affiliation === 'LRU') {
LRU.delete(entry);

@@ -633,9 +633,9 @@ LFU.unshift(this.overlap(entry));

if (entry.partition === 'LRU') {
if (entry.region === 'LRU') {
if (entry.affiliation === 'LRU') {
// For memoize.
// Strict checks are ineffective for OLTP.
if (entry === LRU.head) return;
entry.region = 'LFU';
entry.affiliation = 'LFU';
} else {
const delta = LRU.length > LFU.length && LRU.length >= this.capacity - this.partition ? LRU.length / (LFU.length || 1) * (0, alias_1.max)(this.overlapLRU / this.overlapLFU, 1) | 0 || 1 : 1;
const delta = LRU.length >= this.capacity - this.partition ? (0, alias_1.max)(LRU.length / (LFU.length || 1) * (0, alias_1.max)(this.overlapLRU / this.overlapLFU, 1) | 0, 1) : 0;
this.partition = (0, alias_1.min)(this.partition + delta, this.capacity - this.window);

@@ -648,8 +648,8 @@ --this.overlapLFU;

} else {
if (entry.region === 'LFU') {} else {
const delta = LFU.length > LRU.length && LFU.length >= this.partition ? LFU.length / (LRU.length || 1) * (0, alias_1.max)(this.overlapLFU / this.overlapLRU, 1) | 0 || 1 : 1;
if (entry.affiliation === 'LFU') {} else {
const delta = LFU.length >= this.partition ? (0, alias_1.max)(LFU.length / (LRU.length || 1) * (0, alias_1.max)(this.overlapLFU / this.overlapLRU, 1) | 0, 1) : 0;
this.partition = (0, alias_1.max)(this.partition - delta, 0);
entry.region = 'LFU';
entry.affiliation = 'LFU';
--this.overlapLRU;
if (this.overlapLRU * 100 < this.LFU.length * this.sample) {
if (this.declination !== 1 && this.overlapLRU * 100 < this.LFU.length * this.sample) {
this.declination = 1;

@@ -687,6 +687,6 @@ }

if (victim !== undefined) {
victim.region === 'LFU' && --this.overlapLFU;
victim.affiliation === 'LFU' && --this.overlapLFU;
this.dict.delete(victim.key);
this.dict.set(key, victim);
victim.region = 'LRU';
victim.affiliation = 'LRU';
LRU.head = victim;

@@ -693,0 +693,0 @@ this.update(victim, key, value, size, expiration);

4

package.json
{
"name": "dw-cache",
"version": "0.0.103",
"version": "0.0.104",
"description": "The highest performance constant complexity cache algorithm.",

@@ -53,3 +53,3 @@ "private": false,

"npm-check-updates": "^16.10.12",
"spica": "0.0.727",
"spica": "0.0.729",
"ts-loader": "^9.4.3",

@@ -56,0 +56,0 @@ "typescript": "5.0.4",

155

README.md

@@ -104,11 +104,11 @@ # Dual Window Cache

- High hit ratio (DS1, S3, OLTP, GLI)
- ***Highest hit ratio among all the general-purpose cache algorithms.***
- ***Highest hit ratio of all the general-purpose cache algorithms.***
- Approximate to W-TinyLFU (DS1, GLI).
- Approximate to ARC (S3, OLTP).
- W-TinyLFU is a general-purpose cache algorithm **only when enabling dynamic window and incremental reset**.
- W-TinyLFU's benchmark settings are not described (Especially suspicious with OLTP).
- W-TinyLFU is difficult to implement without pointer addresses.
- ***Highest engineering hit ratio among all the general cache algorithms.***
- Highest memory efficiency
- ***Highest hits per memory size.***
- W-TinyLFU is basically not a general-purpose cache algorithm due to some problems.
- W-TinyLFU is not a general-purpose cache algorithm *without dynamic window and incremental reset*.
- W-TinyLFU is impossible to efficiently implement *without pointer addresses or fast hash functions*.
- W-TinyLFU's benchmark settings are not described (Especially suspicious with OLTP).
- ***Highest engineering hit ratio of all the general cache algorithms.***
- As a result of engineering efficiency.
- Low time overhead (High throughput)

@@ -123,2 +123,3 @@ - Use only two lists.

- Low memory usage
- Largest capacity per memory size of all the advanced cache algorithms.
- Constant extra space complexity.

@@ -129,3 +130,3 @@ - Retain only keys of resident entries (No history).

- Low space overhead
- Add only two small fields to entries.
- Add only two smallest fields to entries.
- High resistance

@@ -135,3 +136,5 @@ - Scan, loop, and burst resistance

- Not the highest mathematical hit ratio
- Very smaller cache size than sufficient can degrade hit ratio
- Highest hit ratio of each workload are resulted by W-TinyLFU or ARC.
- Statistical accuracy dependent
- Very smaller cache size than sufficient can degrade hit ratio.

@@ -146,5 +149,2 @@ ## Tradeoffs

- **Scan access clears all entries.**
- DWC
- Not the highest mathematical hit ratio
- Very smaller cache size than sufficient can degrade hit ratio
- ARC

@@ -158,2 +158,5 @@ - Middle performance

- No loop resistance.
- DWC
- Not the highest mathematical hit ratio
- Statistical accuracy dependent
- LIRS

@@ -170,5 +173,7 @@ - Extremely inefficient

- Incomplete algorithm
- *Burst access degrades performance.*
- **TinyLFU is just a vulnerable incomplete base-algorithm of W-TinyLFU.**
- *Burst access saturates Bloom filters.*
- TinyLFU is worse than LRU in theory.
- **TinyLFU is just an incomplete implementation of W-TinyLFU.**
- Language dependent
- *Impossible to efficiently implement without pointer addresses or fast hash functions.*
- High overhead

@@ -182,4 +187,6 @@ - Read and write average 40 array elements per access.

- Vulnerable algorithm
- *Burst access saturates Bloom filters.*
- *Burst access degrades performance.*
- W-TinyLFU
- Language dependent
- *Impossible to efficiently implement without pointer addresses or fast hash functions.*
- High overhead

@@ -200,6 +207,2 @@ - Read and write average 40 array elements per access.

- W-TinyLFU's results are the traces of Caffeine.
- Mathematical evaluation is the most common evaluation method.
- Engineering evaluation is a corrected evaluation method based on hits per memory size.
- Current engineering hit ratios are calculated by simplified evaluation.
- Accurate last engineering hit ratios of W-TinyLFU are approx. +10%.

@@ -263,3 +266,3 @@ 1. Set the datasets to `./benchmark/trace` (See `./benchmark/ratio.ts`).

label: 'DWC',
data: [11.73, 28.25, 39.03, 44.72, 51.39, 57.64, 62.30, 68.83],
data: [11.73, 28.52, 39.10, 44.72, 51.39, 57.64, 62.30, 68.83],
borderColor: Utils.color(2),

@@ -286,3 +289,3 @@ },

![image](https://github.com/falsandtru/dw-cache/assets/3143368/2f1329c5-cb5e-4f95-adf1-a80d26b75173)
![image](https://github.com/falsandtru/dw-cache/assets/3143368/72b8c5f6-4b15-48c9-9405-05ac0c52d55e)

@@ -302,11 +305,11 @@ W-TinyLFU > DWC > (LIRS) > (TinyLFU) > ARC > LRU

LRU hit ratio 10.74%
DWC hit ratio 28.25%
DWC - LRU hit ratio delta 17.50%
DWC / LRU hit ratio rate 262%
DWC hit ratio 28.52%
DWC - LRU hit ratio delta 17.77%
DWC / LRU hit ratio rate 265%
DS1 3,000,000
LRU hit ratio 18.59%
DWC hit ratio 39.03%
DWC - LRU hit ratio delta 20.44%
DWC / LRU hit ratio rate 209%
DWC hit ratio 39.10%
DWC - LRU hit ratio delta 20.51%
DWC / LRU hit ratio rate 210%

@@ -366,3 +369,3 @@ DS1 4,000,000

label: 'DWC',
data: [10.23, 18.93, 25.07, 30.44, 38.04, 46.81, 55.71, 64.02],
data: [10.46, 19.03, 25.07, 30.44, 38.04, 46.81, 55.71, 64.03],
borderColor: Utils.color(2),

@@ -389,3 +392,3 @@ },

![image](https://github.com/falsandtru/dw-cache/assets/3143368/77633253-2e85-4fb3-b5f3-154dae3208e8)
![image](https://github.com/falsandtru/dw-cache/assets/3143368/9893c7b4-e52a-4a5d-9128-2ad51abbdcfc)

@@ -399,11 +402,11 @@ W-TinyLFU > (TinyLFU) > (LIRS) > DWC, ARC > LRU

LRU hit ratio 2.32%
DWC hit ratio 10.23%
DWC - LRU hit ratio delta 7.90%
DWC / LRU hit ratio rate 439%
DWC hit ratio 10.46%
DWC - LRU hit ratio delta 8.14%
DWC / LRU hit ratio rate 449%
S3 200,000
LRU hit ratio 4.63%
DWC hit ratio 18.93%
DWC - LRU hit ratio delta 14.30%
DWC / LRU hit ratio rate 408%
DWC hit ratio 19.03%
DWC - LRU hit ratio delta 14.40%
DWC / LRU hit ratio rate 410%

@@ -442,4 +445,4 @@ S3 300,000

LRU hit ratio 56.59%
DWC hit ratio 64.02%
DWC - LRU hit ratio delta 7.42%
DWC hit ratio 64.03%
DWC - LRU hit ratio delta 7.44%
DWC / LRU hit ratio rate 113%

@@ -470,3 +473,3 @@ ```

label: 'DWC',
data: [19.47, 28.93, 33.94, 37.52, 39.86, 41.74, 43.27, 44.73],
data: [19.31, 28.74, 34.04, 37.53, 39.82, 41.78, 43.26, 44.66],
borderColor: Utils.color(2),

@@ -494,3 +497,3 @@ },

![image](https://github.com/falsandtru/dw-cache/assets/3143368/d180aa29-b420-48e9-ab74-be0042ff486b)
![image](https://github.com/falsandtru/dw-cache/assets/3143368/10e4d0ed-c7bc-459b-ba37-85fbd6dea80a)

@@ -504,16 +507,16 @@ W-TinyLFU > ARC > DWC > (LIRS) > LRU > (TinyLFU)

LRU hit ratio 16.47%
DWC hit ratio 19.47%
DWC - LRU hit ratio delta 2.99%
DWC / LRU hit ratio rate 118%
DWC hit ratio 19.31%
DWC - LRU hit ratio delta 2.84%
DWC / LRU hit ratio rate 117%
OLTP 500
LRU hit ratio 23.44%
DWC hit ratio 28.93%
DWC - LRU hit ratio delta 5.48%
DWC / LRU hit ratio rate 123%
DWC hit ratio 28.74%
DWC - LRU hit ratio delta 5.29%
DWC / LRU hit ratio rate 122%
OLTP 750
LRU hit ratio 28.28%
DWC hit ratio 33.94%
DWC - LRU hit ratio delta 5.66%
DWC hit ratio 34.04%
DWC - LRU hit ratio delta 5.76%
DWC / LRU hit ratio rate 120%

@@ -523,4 +526,4 @@

LRU hit ratio 32.83%
DWC hit ratio 37.52%
DWC - LRU hit ratio delta 4.69%
DWC hit ratio 37.53%
DWC - LRU hit ratio delta 4.70%
DWC / LRU hit ratio rate 114%

@@ -530,10 +533,10 @@

LRU hit ratio 36.20%
DWC hit ratio 39.86%
DWC - LRU hit ratio delta 3.65%
DWC / LRU hit ratio rate 110%
DWC hit ratio 39.82%
DWC - LRU hit ratio delta 3.61%
DWC / LRU hit ratio rate 109%
OLTP 1,500
LRU hit ratio 38.69%
DWC hit ratio 41.74%
DWC - LRU hit ratio delta 3.04%
DWC hit ratio 41.78%
DWC - LRU hit ratio delta 3.09%
DWC / LRU hit ratio rate 107%

@@ -543,4 +546,4 @@

LRU hit ratio 40.78%
DWC hit ratio 43.27%
DWC - LRU hit ratio delta 2.48%
DWC hit ratio 43.26%
DWC - LRU hit ratio delta 2.47%
DWC / LRU hit ratio rate 106%

@@ -550,4 +553,4 @@

LRU hit ratio 42.46%
DWC hit ratio 44.73%
DWC - LRU hit ratio delta 2.26%
DWC hit ratio 44.66%
DWC - LRU hit ratio delta 2.19%
DWC / LRU hit ratio rate 105%

@@ -578,3 +581,3 @@ ```

label: 'DWC',
data: [16.24, 32.38, 41.35, 49.61, 52.60, 53.78, 55.66, 57.96],
data: [16.35, 32.89, 41.35, 49.61, 52.60, 53.78, 55.66, 57.96],
borderColor: Utils.color(2),

@@ -601,3 +604,3 @@ },

![image](https://github.com/falsandtru/dw-cache/assets/3143368/246898d9-91ea-48ff-bfdb-2265b5bf4d10)
![image](https://github.com/falsandtru/dw-cache/assets/3143368/46457608-8d90-4b83-ba64-13292b08aa1c)

@@ -611,11 +614,11 @@ W-TinyLFU, (LIRS) > DWC > (TinyLFU) >> ARC > LRU

LRU hit ratio 0.93%
DWC hit ratio 16.24%
DWC - LRU hit ratio delta 15.30%
DWC / LRU hit ratio rate 1744%
DWC hit ratio 16.35%
DWC - LRU hit ratio delta 15.42%
DWC / LRU hit ratio rate 1757%
GLI 500
LRU hit ratio 0.96%
DWC hit ratio 32.38%
DWC - LRU hit ratio delta 31.41%
DWC / LRU hit ratio rate 3358%
DWC hit ratio 32.89%
DWC - LRU hit ratio delta 31.93%
DWC / LRU hit ratio rate 3412%

@@ -665,4 +668,4 @@ GLI 750

LRU hit ratio 0.00%
DWC hit ratio 7.69%
DWC - LRU hit ratio delta 7.69%
DWC hit ratio 7.54%
DWC - LRU hit ratio delta 7.54%
DWC / LRU hit ratio rate Infinity%

@@ -672,4 +675,4 @@

LRU hit ratio 0.00%
DWC hit ratio 18.47%
DWC - LRU hit ratio delta 18.47%
DWC hit ratio 18.56%
DWC - LRU hit ratio delta 18.56%
DWC / LRU hit ratio rate Infinity%

@@ -679,4 +682,4 @@

LRU hit ratio 0.00%
DWC hit ratio 41.99%
DWC - LRU hit ratio delta 41.99%
DWC hit ratio 41.83%
DWC - LRU hit ratio delta 41.83%
DWC / LRU hit ratio rate Infinity%

@@ -686,4 +689,4 @@

LRU hit ratio 0.00%
DWC hit ratio 69.01%
DWC - LRU hit ratio delta 69.01%
DWC hit ratio 62.78%
DWC - LRU hit ratio delta 62.78%
DWC / LRU hit ratio rate Infinity%

@@ -693,4 +696,4 @@

LRU hit ratio 0.00%
DWC hit ratio 96.90%
DWC - LRU hit ratio delta 96.90%
DWC hit ratio 96.78%
DWC - LRU hit ratio delta 96.78%
DWC / LRU hit ratio rate Infinity%

@@ -697,0 +700,0 @@

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