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dw-cache - npm Package Compare versions

Comparing version 0.0.80 to 0.0.81

44

dist/index.js

@@ -1,2 +0,2 @@

/*! dw-cache v0.0.80 https://github.com/falsandtru/dw-cache | (c) 2021, falsandtru | (Apache-2.0 AND MPL-2.0) License */
/*! dw-cache v0.0.81 https://github.com/falsandtru/dw-cache | (c) 2021, falsandtru | (Apache-2.0 AND MPL-2.0) License */
(function webpackUniversalModuleDefinition(root, factory) {

@@ -459,6 +459,3 @@ if(typeof exports === 'object' && typeof module === 'object')

this.sweeper = new Sweeper(this.indexes.LRU, settings.sweep.threshold, capacity, settings.sweep.window, settings.sweep.range, settings.sweep.shift);
this.ager = new Ager(capacity, this.indexes.LFU, node => {
this.indexes.LRU.unshiftNode(node);
++this.overlap;
});
this.ager = new Clock(capacity, this.indexes.LFU);
this.life = settings.life;

@@ -480,3 +477,3 @@ this.disposer = settings.disposer;

//assert(this.memory.size <= this.capacity);
this.ager.escape(node);
this.ager.free(node);
const entry = node.value;

@@ -510,3 +507,3 @@ entry.region === 'LFU' && node.list === this.indexes.LRU && --this.overlap;

if (node !== undefined) {
this.ager.escape(node);
this.ager.free(node);
LRU.unshiftNode(node);

@@ -538,3 +535,9 @@ ++this.overlap;

}
this.ager.advance();
{
const node = this.ager.advance();
if (node !== undefined) {
this.indexes.LRU.unshiftNode(node);
++this.overlap;
}
}
const {

@@ -571,3 +574,3 @@ LRU,

}
this.ager.escape(node);
this.ager.skip(node);
node.moveToHead();

@@ -705,3 +708,3 @@ if (node.list === LFU) {

this.stats.hitLFU();
this.ager.escape(node);
this.ager.skip(node);
node.moveToHead();

@@ -1009,7 +1012,6 @@ }

}
class Ager {
constructor(capacity, target, disposer) {
class Clock {
constructor(capacity, target) {
this.capacity = capacity;
this.target = target;
this.disposer = disposer;
}

@@ -1019,12 +1021,20 @@ age(rate) {

}
escape(node) {
free(node) {
if (node !== this.hand) return;
this.hand = node.prev === node ? undefined : node.prev;
}
skip(node) {
if (node !== this.hand) return;
this.hand = node.prev;
}
advance() {
const node = this.hand ??= this.target.last;
if (node === undefined) return;
this.escape(node);
if (--node.value.age !== 0) return;
this.disposer(node);
if (--node.value.age !== 0) {
this.skip(node);
return;
} else {
this.free(node);
return node;
}
}

@@ -1031,0 +1041,0 @@ clear() {

{
"name": "dw-cache",
"version": "0.0.80",
"version": "0.0.81",
"description": "The highest performance constant complexity cache algorithm.",

@@ -39,3 +39,3 @@ "private": false,

"babel-plugin-unassert": "^3.2.0",
"concurrently": "^7.5.0",
"concurrently": "^7.6.0",
"eslint": "^8.28.0",

@@ -54,3 +54,3 @@ "eslint-plugin-redos": "^4.4.1",

"npm-check-updates": "^16.4.1",
"spica": "0.0.684",
"spica": "0.0.685",
"ts-loader": "^9.4.1",

@@ -57,0 +57,0 @@ "typescript": "4.9.3",

@@ -81,3 +81,3 @@ # Dual Window Cache

LIRS's burst resistance means resistance to continuous cache miss.
LIRS's burst resistance means resistance to continuous cache misses.

@@ -125,3 +125,3 @@ |Algorithm|Type |Scan|Loop|Burst|

- Lower hit ratio than LRU at OLTP.
- Many major benchmarks are lacking in the paper despite performance of TinyLFU is significantly worse than W-TinyLFU.
- Many major benchmarks are lacking in the paper despite the performance of TinyLFU is worse than LRU in theory.
- Restricted delete operation

@@ -183,3 +183,3 @@ - Bloom filters don't support delete operation.

W-TinyLFU > (LIRS) > DWC > (TinyLFU) > ARC > LRU
W-TinyLFU > DWC, (LIRS) > (TinyLFU) > ARC > LRU

@@ -284,3 +284,3 @@ - DWC is significantly better than ARC.

W-TinyLFU > (TinyLFU) > (LIRS) > ARC, DWC > LRU
W-TinyLFU > (TinyLFU) > (LIRS) > DWC, ARC > LRU

@@ -641,29 +641,29 @@ - DWC is an approximation of ARC.

```
'LRUCache new x 11,661 ops/sec ±1.70% (118 runs sampled)'
'LRUCache new x 10,819 ops/sec ±1.11% (120 runs sampled)'
'DW-Cache new x 4,652,638 ops/sec ±1.58% (124 runs sampled)'
'DW-Cache new x 4,381,322 ops/sec ±4.02% (121 runs sampled)'
'LRUCache simulation 10 x 8,050,337 ops/sec ±1.77% (120 runs sampled)'
'LRUCache simulation 10 x 7,763,556 ops/sec ±2.14% (119 runs sampled)'
'DW-Cache simulation 10 x 6,710,942 ops/sec ±1.63% (120 runs sampled)'
'DW-Cache simulation 10 x 6,656,759 ops/sec ±1.89% (120 runs sampled)'
'LRUCache simulation 100 x 8,164,125 ops/sec ±1.99% (119 runs sampled)'
'LRUCache simulation 100 x 8,057,796 ops/sec ±2.19% (119 runs sampled)'
'DW-Cache simulation 100 x 5,490,218 ops/sec ±1.93% (121 runs sampled)'
'DW-Cache simulation 100 x 5,905,965 ops/sec ±1.91% (119 runs sampled)'
'LRUCache simulation 1,000 x 7,235,839 ops/sec ±2.05% (119 runs sampled)'
'LRUCache simulation 1,000 x 7,084,194 ops/sec ±2.15% (118 runs sampled)'
'DW-Cache simulation 1,000 x 5,884,598 ops/sec ±2.12% (121 runs sampled)'
'DW-Cache simulation 1,000 x 6,416,383 ops/sec ±2.03% (120 runs sampled)'
'LRUCache simulation 10,000 x 6,531,732 ops/sec ±1.97% (121 runs sampled)'
'LRUCache simulation 10,000 x 6,185,703 ops/sec ±1.99% (119 runs sampled)'
'DW-Cache simulation 10,000 x 5,490,438 ops/sec ±1.71% (120 runs sampled)'
'DW-Cache simulation 10,000 x 5,394,210 ops/sec ±1.72% (121 runs sampled)'
'LRUCache simulation 100,000 x 3,711,646 ops/sec ±1.38% (114 runs sampled)'
'LRUCache simulation 100,000 x 2,536,503 ops/sec ±1.78% (108 runs sampled)'
'DW-Cache simulation 100,000 x 3,207,537 ops/sec ±1.52% (115 runs sampled)'
'DW-Cache simulation 100,000 x 2,117,919 ops/sec ±2.79% (110 runs sampled)'
'LRUCache simulation 1,000,000 x 1,811,364 ops/sec ±2.59% (99 runs sampled)'
'LRUCache simulation 1,000,000 x 1,272,477 ops/sec ±3.51% (106 runs sampled)'
'DW-Cache simulation 1,000,000 x 1,440,382 ops/sec ±2.25% (107 runs sampled)'
'DW-Cache simulation 1,000,000 x 1,046,930 ops/sec ±2.32% (109 runs sampled)'
```

@@ -682,6 +682,6 @@

|Rank |Algorithms |
|Class |Algorithms |
|:--------|:-------------|
|Very high|W-TinyLFU |
|Hight |(LIRS) > DWC |
|Hight |DWC, (LIRS) |
|Middle |ARC, (TinyLFU)|

@@ -701,8 +701,8 @@ |Low |LRU |

|Rank |Algorithms |
|:-----|:-----------------|
|High |W-TinyLFU > (LIRS)|
|Middle|(TinyLFU) >= DWC |
|Low |ARC |
|None |LRU |
|Class|Effect|Algorithms |
|:----|:-----|:----------------|
|Total|High |W-TinyLFU, DWC |
|Most |High |(TinyLFU), (LIRS)|
|Few |Low |ARC |
|None |None |LRU |

@@ -709,0 +709,0 @@ ### Throughput

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